The one published version I've seen does not, that's true.
But the overall behavior of the MBC is pretty simple, and a version that supports SRAM would be totally attainable with a very small modification to existing logic-gate based designs.
But really, I don't like playing with 'em, I mean, it sucks having to pack in even one extra IC, much less what it takes to replicate an MBC.
Replicating a full MBC1's logic table on an AVR shouldn't be too challenging, so long as the speed's up to snuff, though I ain't worried about that.
Good luck! I'm excited to see what you come up with.